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J.D., cum laude, University of Wisconsin Law School, 2007 M.S., Electrical Engineering, University of Wisconsin-Madison, 1995 B.S., Electrical Engineering, with honors, University of Wisconsin-Madison, 1992
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Associate |
| Portland |
| Main 503-595-5300 |
| Fax 503-595-5301 |
| doug.dallmann@klarquist.com |
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Practice Areas
Mr. Dallmann’s practice focuses on the preparation and prosecution of patent and trademark applications and supporting patent litigation. Mr. Dallmann also advises clients on licensing issues and has experience in performing due diligence analyses in intellectual property acquisition concerns. |
Technical Expertise
Mr. Dallmann’s technical expertise includes the fields of electrical engineering and software, with specific expertise in the areas of semiconductor device physics and manufacturing, electronic design automation (EDA) and all phases of the VLSI circuit design cycle (architecture and circuit-level design, reliability and performance verification, layout design and verification). In addition to preparing and prosecuting patent applications in the electrical engineering and software arts, Mr. Dallmann has experience in prosecuting mechanical patents in a wide variety of areas and renewable energies (solar cells, wind turbines) and is exploring the area of MEMs technologies. He has worked with electronics industry leaders such as Intel, Motorola and IBM. |
Bar Admissions Oregon, 2008 Wisconsin, 2007 (Inactive) Federal District Court - Western District of Wisconsin, 2007 U.S. Patent and Trademark Office (Reg. No. 65636) |
Prior Professional Experience Intel Corp. Component Designer/Design Manager 1998-2004 Designed memory circuits used in server and workstation products and developed design methodologies.
Motorola, Inc. Circuit Designer 1995-1998 Designed both bulk and silicon-on-insulator (SOI) memory circuits for stand-alone SRAM designs and product development vehicles. Led efforts to export in-house memory designs for fabrication in external silicon foundries.
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Presentations and Publications D. Dallmann and K. Shenai, “Scaling Constraints Imposed by Self-Heating in Submicron SOI MOSSFETs”, IEEE Transactions on Electron Devices, vol. 42, pp. 489-496, Mar. 1994.
D. Dallmann and K. Shenai, “Effects of Self-Heating in Submicron VLSI SOI Devices”, International Reliability Workshop, 1994 International Reliability Workshop, pp. 83-89. |
Professional Activities American Intellectual Property Law Association, American Bar Association, Oregon Patent Law Association
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Year Joined Firm 2007
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